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jkff_SR.cpp
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1 /***************************************************************************
2  jkff_SR
3  ---------
4  begin : December 2008
5  copyright : (C) 2008 by Mike Brinson
6  email : mbrin72043@yahoo.co.uk
7  ***************************************************************************/
8 
9 /*
10  * jkff_SR.cpp - device implementations for jkff_SR module
11  *
12  * This is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License as published by
14  * the Free Software Foundation; either version 2, or (at your option)
15  * any later version.
16  *
17  */
18 #include <QtGui>
19 #include "jkff_SR.h"
20 #include "node.h"
21 #include "main.h"
22 
24 {
25  Type = isComponent; // Analogue and digital component.
26  Description = QObject::tr ("jk flip flop with set and reset verilog device");
27 
28  Props.append (new Property ("TR_H", "6", false,
29  QObject::tr ("cross coupled gate transfer function high scaling factor")));
30  Props.append (new Property ("TR_L", "5", false,
31  QObject::tr ("cross coupled gate transfer function low scaling factor")));
32  Props.append (new Property ("Delay", "1 ns", false,
33  QObject::tr ("cross coupled gate delay")
34  +" ("+QObject::tr ("s")+")"));
35 
36  createSymbol ();
37  tx = x1 + 4;
38  ty = y2 + 4;
39  Model = "jkff_SR";
40  Name = "Y";
41 }
42 
44 {
45  jkff_SR * p = new jkff_SR();
46  p->Props.getFirst()->Value = Props.getFirst()->Value;
47  p->recreate(0);
48  return p;
49 }
50 
51 Element * jkff_SR::info(QString& Name, char * &BitmapFile, bool getNewOne)
52 {
53  Name = QObject::tr("JK-FlipFlop w/ SR");
54  BitmapFile = (char *) "jkff_SR";
55 
56  if(getNewOne) return new jkff_SR();
57  return 0;
58 }
59 
61 {
62  // put in here symbol drawing code and terminal definitions
63  Lines.append(new Line(-30,-40, 30,-40,QPen(Qt::darkBlue,2)));
64  Lines.append(new Line( 30,-40, 30, 40,QPen(Qt::darkBlue,2)));
65  Lines.append(new Line( 30, 40,-30, 40,QPen(Qt::darkBlue,2)));
66  Lines.append(new Line(-30, 40,-30,-40,QPen(Qt::darkBlue,2)));
67 
68  Lines.append(new Line(-50,-20,-30,-20,QPen(Qt::darkBlue,2)));
69  Lines.append(new Line(-50, 20,-30, 20,QPen(Qt::darkBlue,2)));
70  Lines.append(new Line( 30, 20, 50, 20,QPen(Qt::darkBlue,2)));
71  Lines.append(new Line( 30,-20, 50,-20,QPen(Qt::darkBlue,2)));
72 
73  Lines.append(new Line(-50, 0,-30, 0,QPen(Qt::darkBlue,2)));
74 
75  Lines.append(new Line(-30,-10,-20, 0,QPen(Qt::darkBlue,2)));
76  Lines.append(new Line(-30, 10,-20, 0,QPen(Qt::darkBlue,2)));
77 
78  Lines.append(new Line( 0,-50, 0,-60,QPen(Qt::darkBlue,2)));
79  Lines.append(new Line( 0, 50, 0, 60,QPen(Qt::darkBlue,2)));
80 
81  Arcs.append(new Arc( -5, -50, 10, 10, 0, 16*360, QPen(Qt::darkBlue,2)));
82  Arcs.append(new Arc( -5, 40, 10, 10, 0, 16*360, QPen(Qt::darkBlue,2)));
83 
84  Texts.append(new Text(-25,-32, "J", Qt::darkBlue, 12.0));
85  Texts.append(new Text(-25, 7, "K", Qt::darkBlue, 12.0));
86  Texts.append(new Text( 11,-32, "Q", Qt::darkBlue, 12.0));
87  Texts.append(new Text( -5,-39, "S", Qt::darkBlue, 12.0));
88  Texts.append(new Text( 11, 7, "Q", Qt::darkBlue, 12.0));
89  Texts.current()->over=true;
90  Texts.append(new Text( -5, 17, "R", Qt::darkBlue, 12.0));
91 
92  Ports.append(new Port( 0,-60)); // S
93  Ports.append(new Port(-50,-20)); // J
94  Ports.append(new Port(-50, 0)); // CLK
95  Ports.append(new Port(-50, 20)); // K
96  Ports.append(new Port( 0, 60)); // R
97  Ports.append(new Port( 50, 20)); // QB
98  Ports.append(new Port( 50,-20)); // Q
99 
100  x1 = -50; y1 = -60;
101  x2 = 50; y2 = 60;
102 }
103 
104 QString jkff_SR::vhdlCode( int )
105 {
106  QString s="";
107 
108  QString td = Props.at(2)->Value; // delay time
109  if(!VHDL_Delay(td, Name)) return td; // time has not VHDL format
110  td += ";\n";
111 
112  QString S = Ports.at(0)->Connection->Name;
113  QString J = Ports.at(1)->Connection->Name;
114  QString CLK = Ports.at(2)->Connection->Name;
115  QString K = Ports.at(3)->Connection->Name;
116  QString R = Ports.at(4)->Connection->Name;
117  QString QB = Ports.at(5)->Connection->Name;
118  QString Q = Ports.at(6)->Connection->Name;
119 
120  s = "\n "+Name+":process ("+S+", "+CLK+", "+R+") is\n"+
121  " variable state : std_logic;\n"+
122  " begin\n" +
123  " if ("+S+" = '0') then state := '1';\n"+
124  " elsif ("+R+" = '0') then state := '0';\n"+
125  " elsif ("+CLK+" = '1' and "+CLK+"'event) then\n"+
126  " if ("+J+" = '1' and "+K+" = '1') then state := not state;\n"+
127  " elsif ("+J+" = '1' and "+K+" = '0') then state := '1';\n"+
128  " elsif ("+J+" = '0' and "+K+" = '1') then state := '0';\n"+
129  " end if;\n"+
130  " end if;\n"+
131  " "+Q+" <= state"+td+
132  " "+QB+" <= not state"+td+
133  " end process;\n" ;
134  return s;
135 }
136 
137 QString jkff_SR::verilogCode( int )
138 {
139  QString td = Props.at(2)->Value; // delay time
140  if(!Verilog_Delay(td, Name)) return td; // time does not have VHDL format
141 
142  QString l = "";
143 
144  QString S = Ports.at(0)->Connection->Name;
145  QString J = Ports.at(1)->Connection->Name;
146  QString CLK = Ports.at(2)->Connection->Name;
147  QString K = Ports.at(3)->Connection->Name;
148  QString R = Ports.at(4)->Connection->Name;
149  QString QB = Ports.at(5)->Connection->Name;
150  QString Q = Ports.at(6)->Connection->Name;
151 
152  QString QR = "Q_reg" + Name + Q;
153  QString QBR = "QB_reg" + Name + QB;
154  QString ST = "Q_state" + Name;
155 
156  l = "\n // "+Name+" jk flip-flop with set and reset\n"+
157  " assign "+Q+" = "+QR+";\n"+
158  " reg "+QR+" = 0;\n"+
159  " assign "+QB+" = "+QBR+";\n"+
160  " reg "+QBR+" = 1;\n"+
161  " reg "+ST+" = 0;\n"+
162  " always @ (posedge "+CLK+")\n"+
163  " begin\n"+
164  " if ("+R+" == 1 && "+S+" == 1)\n"+
165  " begin\n"+
166  " if ("+J+" == 1 && "+K+" == 1) "+ST+" = ~"+ST+";\n"+
167  " if ("+J+" == 1 && "+K+" == 0) "+ST+" = 1;\n"+
168  " if ("+J+" == 0 && "+K+" == 1) "+ST+" = 0;\n"+
169  " "+QR+" <="+td+" "+ST+";\n"+
170  " "+QBR+" <="+td+" ~"+ST+";\n"+
171  " end\n"+
172  " end\n"+
173  " always @ ("+R+")\n"+
174  " begin\n"+
175  " if ("+R+" == 0) "+ST+" = 0;\n"+
176  " "+QR+" <="+td+" "+ST+";\n"+
177  " "+QBR+" <="+td+" ~"+ST+";\n"+
178  " end\n" +
179  " always @ ("+S+")\n"+
180  " begin\n"+
181  " if ("+S+" == 0) "+ST+" = 1;\n"+
182  " "+QR+" <="+td+" "+ST+";\n"+
183  " "+QBR+" <="+td+" ~"+ST+";\n"+
184  " end\n";
185  return l;
186 }
Q3PtrList< Line > Lines
Definition: component.h:67
Component * newOne()
Definition: jkff_SR.cpp:43
QString verilogCode(int)
Definition: jkff_SR.cpp:137
int Type
Definition: element.h:152
Definition: element.h:55
int y1
Definition: element.h:153
bool VHDL_Delay(QString &td, const QString &Name)
Definition: main.cpp:493
Q3PtrList< struct Arc > Arcs
Definition: component.h:68
int tx
Definition: component.h:78
int y2
Definition: element.h:153
static Element * info(QString &, char *&, bool getNewOne=false)
Definition: jkff_SR.cpp:51
Definition: element.h:72
int x1
Definition: element.h:153
jkff_SR()
Definition: jkff_SR.cpp:23
bool Verilog_Delay(QString &td, const QString &Name)
Definition: main.cpp:555
Definitions and declarations for the main application.
int ty
Definition: component.h:78
Q3PtrList< Property > Props
Definition: component.h:72
Definition: element.h:82
Definition: element.h:48
Superclass of all schematic drawing elements.
Definition: element.h:142
Q3PtrList< Port > Ports
Definition: component.h:70
QString Name
Definition: component.h:80
Q3PtrList< Text > Texts
Definition: component.h:71
QString Model
Definition: component.h:80
void createSymbol()
Definition: jkff_SR.cpp:60
QString Description
Definition: component.h:81
#define isComponent
Definition: element.h:110
QString vhdlCode(int)
Definition: jkff_SR.cpp:104
int x2
Definition: element.h:153
virtual void recreate(Schematic *)
Definition: component.h:39