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fa2b.cpp
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1 /***************************************************************************
2  fa2b
3  ------
4  begin : December 2008
5  copyright : (C) 2008 by Mike Brinson
6  email : mbrin72043@yahoo.co.uk
7  ***************************************************************************/
8 
9 /*
10  * fa2b.cpp - device implementations for fa2b module
11  *
12  * This is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License as published by
14  * the Free Software Foundation; either version 2, or (at your option)
15  * any later version.
16  *
17  */
18 #include <QtGui>
19 #include "fa2b.h"
20 #include "node.h"
21 #include "main.h"
22 
24 {
25  Type = isComponent; // Analogue and digital component.
26  Description = QObject::tr ("2bit full adder verilog device");
27 
28  Props.append (new Property ("TR", "6", false,
29  QObject::tr ("transfer function high scaling factor")));
30  Props.append (new Property ("Delay", "1 ns", false,
31  QObject::tr ("output delay")
32  +" ("+QObject::tr ("s")+")"));
33 
34  createSymbol ();
35  tx = x1 + 19;
36  ty = y2 + 4;
37  Model = "fa2b";
38  Name = "Y";
39 }
40 
42 {
43  fa2b * p = new fa2b();
44  p->Props.getFirst()->Value = Props.getFirst()->Value;
45  p->recreate(0);
46  return p;
47 }
48 
49 Element * fa2b::info(QString& Name, char * &BitmapFile, bool getNewOne)
50 {
51  Name = QObject::tr("2Bit FullAdder");
52  BitmapFile = (char *) "fa2b";
53 
54  if(getNewOne) return new fa2b();
55  return 0;
56 }
57 
59 {
60  Lines.append(new Line(-40, -60, 40,-60,QPen(Qt::darkBlue,2)));
61  Lines.append(new Line( 40, -60, 40, 90,QPen(Qt::darkBlue,2)));
62  Lines.append(new Line( 40, 90,-40, 90,QPen(Qt::darkBlue,2)));
63  Lines.append(new Line(-40, 90,-40, -60,QPen(Qt::darkBlue,2)));
64 
65  Lines.append(new Line(-60,-10,-40,-10,QPen(Qt::darkBlue,2))); // X0
66  Lines.append(new Line(-60, 10,-40, 10,QPen(Qt::darkBlue,2))); // X1
67  Lines.append(new Line(-60, 30,-40, 30,QPen(Qt::darkBlue,2))); // Y0
68  Lines.append(new Line(-60, 50,-40, 50,QPen(Qt::darkBlue,2))); // Y1
69  Lines.append(new Line(-60, 70,-40, 70,QPen(Qt::darkBlue,2))); // CI
70 
71  Lines.append(new Line( 40, 30, 60, 30,QPen(Qt::darkBlue,2))); // C0
72  Lines.append(new Line( 40, 10, 60, 10,QPen(Qt::darkBlue,2))); // S1
73  Lines.append(new Line( 40,-10, 60,-10,QPen(Qt::darkBlue,2))); // S0
74 
75  Lines.append(new Line( -10, -55, 10, -55, QPen(Qt::darkBlue,2)));
76  Lines.append(new Line( -10, -55, 0, -45, QPen(Qt::darkBlue,2)));
77  Lines.append(new Line( 0, -45,-10, -35, QPen(Qt::darkBlue,2)));
78  Lines.append(new Line( -10, -35, 10, -35, QPen(Qt::darkBlue,2)));
79 
80  Texts.append(new Text(-25,-20, "{", Qt::darkBlue, 16.0));
81  Texts.append(new Text(-15,-13, "X", Qt::darkBlue, 12.0));
82  Texts.append(new Text(-35,-23, "0", Qt::darkBlue, 12.0));
83  Texts.append(new Text(-35, -3, "1", Qt::darkBlue, 12.0));
84  Texts.append(new Text(-25, 22, "{", Qt::darkBlue, 16.0));
85  Texts.append(new Text(-15, 29, "Y", Qt::darkBlue, 12.0));
86  Texts.append(new Text(-35, 17, "0", Qt::darkBlue, 12.0));
87  Texts.append(new Text(-35, 37, "1", Qt::darkBlue, 12.0));
88  Texts.append(new Text(-35, 57, "CI", Qt::darkBlue, 12.0));
89  Texts.append(new Text( 17,-20, "}", Qt::darkBlue, 16.0));
90  Texts.append(new Text( 3, -13, "S", Qt::darkBlue, 12.0));
91  Texts.append(new Text( 28,-23, "0", Qt::darkBlue, 12.0));
92  Texts.append(new Text( 28, -3, "1", Qt::darkBlue, 12.0));
93  Texts.append(new Text( 10, 17, "CO", Qt::darkBlue, 12.0));
94 
95  Ports.append(new Port(-60,-10)); // X0 -> D
96  Ports.append(new Port(-60, 10)); // X1 -> C
97  Ports.append(new Port(-60, 30)); // Y0 -> B
98  Ports.append(new Port(-60, 50)); // Y1 -> A
99  Ports.append(new Port(-60, 70)); // CI -> E
100  Ports.append(new Port( 60, 30)); // CO
101  Ports.append(new Port( 60, 10)); // S1
102  Ports.append(new Port( 60,-10)); // S0
103 
104  x1 = -60; y1 = -64;
105  x2 = 60; y2 = 94;
106 }
107 
108 QString fa2b::vhdlCode( int )
109 {
110  QString s="";
111 
112  QString td = Props.at(1)->Value; // delay time
113  if(!VHDL_Delay(td, Name)) return td; // time has not VHDL format
114  td += ";\n";
115 
116  QString D = Ports.at(0)->Connection->Name;
117  QString C = Ports.at(1)->Connection->Name;
118  QString B = Ports.at(2)->Connection->Name;
119  QString A = Ports.at(3)->Connection->Name;
120  QString E = Ports.at(4)->Connection->Name;
121  QString CO = Ports.at(5)->Connection->Name;
122  QString S1 = Ports.at(6)->Connection->Name;
123  QString S0 = Ports.at(7)->Connection->Name;
124 
125  s = "\n "+Name+":process ("+A+", "+B+", "+C+", "+D+", "+E+ ")\n"+
126  " begin\n" +
127  " "+CO+" <= ("+A+" and "+C+") or (("+A+" or "+C+") and (("+B+" and "+D+") or ("+E+" and "+B+") or ("+E+" and "+ D +")))"+td+
128  " "+S1+" <= (("+B+" and "+D+") or ("+E+" and "+B+") or ("+E+" and "+D+"))"+" xor ("+A+" xor "+C+")"+td+
129  " "+S0+" <= "+E+" xor ("+B+" xor "+D+")"+td+
130  " end process;\n";
131  return s;
132 }
133 
134 QString fa2b::verilogCode( int )
135 {
136  QString td = Props.at(1)->Value; // delay time
137  if(!Verilog_Delay(td, Name)) return td; // time does not have VHDL format
138 
139  QString l = "";
140 
141  QString D = Ports.at(0)->Connection->Name;
142  QString C = Ports.at(1)->Connection->Name;
143  QString B = Ports.at(2)->Connection->Name;
144  QString A = Ports.at(3)->Connection->Name;
145  QString E = Ports.at(4)->Connection->Name;
146  QString CO = Ports.at(5)->Connection->Name;
147  QString S1 = Ports.at(6)->Connection->Name;
148  QString S0 = Ports.at(7)->Connection->Name;
149 
150  QString COR = "CO_reg" + Name + CO;
151  QString S1R = "S1_reg" + Name + S1;
152  QString S0R = "S0_reg" + Name + S0;
153 
154  l = "\n // "+Name+" 2bit fulladder\n"+
155  " assign "+CO+" = "+COR+";\n"+
156  " reg "+COR+" = 0;\n"+
157  " assign "+S1+" = "+S1R+";\n"+
158  " reg "+S1R+" = 0;\n"+
159  " assign "+S0+" = "+S0R+";\n"+
160  " reg "+S0R+" = 0;\n"+
161  " always @ ("+A+" or "+B+" or "+C+" or "+D+" or "+E+")\n"+
162  " begin\n" +
163  " " +COR+" <="+td+" ("+A+" && "+C+") || ("+A+" || "+C+") && ("+B+" && "+D+" || "+E+" && "+B+" || "+E+" && "+D+");\n"+
164  " " +S1R+" <="+td+" ("+B+" && "+D+" || "+E+" && "+B+" || "+E+" && "+D+") ^ ("+A+" ^ "+C+");\n" +
165  " " +S0R+" <="+td+" "+E+" ^ ("+B+" ^ "+D+");\n"+
166  " end\n";
167 
168  return l;
169 }
170 
Q3PtrList< Line > Lines
Definition: component.h:67
Component * newOne()
Definition: fa2b.cpp:41
int Type
Definition: element.h:152
int y1
Definition: element.h:153
bool VHDL_Delay(QString &td, const QString &Name)
Definition: main.cpp:493
int tx
Definition: component.h:78
int y2
Definition: element.h:153
Definition: element.h:72
int x1
Definition: element.h:153
bool Verilog_Delay(QString &td, const QString &Name)
Definition: main.cpp:555
Definitions and declarations for the main application.
int ty
Definition: component.h:78
static Element * info(QString &, char *&, bool getNewOne=false)
Definition: fa2b.cpp:49
QString vhdlCode(int)
Definition: fa2b.cpp:108
Q3PtrList< Property > Props
Definition: component.h:72
fa2b()
Definition: fa2b.cpp:23
Definition: element.h:82
Definition: element.h:48
Superclass of all schematic drawing elements.
Definition: element.h:142
Q3PtrList< Port > Ports
Definition: component.h:70
QString Name
Definition: component.h:80
Q3PtrList< Text > Texts
Definition: component.h:71
QString Model
Definition: component.h:80
QString Description
Definition: component.h:81
Definition: fa2b.h:16
#define isComponent
Definition: element.h:110
void createSymbol()
Definition: fa2b.cpp:58
int x2
Definition: element.h:153
QString verilogCode(int)
Definition: fa2b.cpp:134
virtual void recreate(Schematic *)
Definition: component.h:39