The following table contains the model parameters for the JFET model.
|Vt0||zero -bias threshold voltage|
|Lambda||channel-length modulation parameter|
|Rd||drain ohmic resistance|
|Rs||source ohmic resistance|
|Is||gate-junction saturation current|
|N||gate P-N emission coefficient|
|Isr||gate-junction recombination current parameter|
|Nr||Isr emission coefficient|
|Cgs||zero-bias gate-source junction capacitance|
|Cgd||zero-bias gate-drain junction capacitance|
|Fc||forward-bias junction capacitance coefficient|
|M||gate P-N grading coefficient|
|Kf||flicker noise coefficient|
|Af||flicker noise exponent|
|Ffe||flicker noise frequency exponent|
|Xti||saturation current exponent|
|Vt0tc||Vt0 temperature coefficient|
|Betatce||Beta exponential temperature coefficient|
|Tnom||temperature at which parameters were extracted|
|Area||default area for JFET|
The current equation of the gate source diode and its derivative writes as follows:
The current equation of the gate drain diode and its derivative writes as follows:
Both equations contain the gate-junction saturation current , the gate P-N emission coefficient and the temperature voltage with the Boltzmann's constant and the electron charge . The operating temperature must be specified in Kelvin.
The controlled drain currents have been defined by Shichman and Hodges  for different modes of operations.
normal mode, saturation region:
normal mode, linear region:
inverse mode, saturation region:
inverse mode, linear region:
The MNA matrix entries for the voltage controlled drain current source can be written as:
With the accompanied DC model shown in fig. 10.7 using the same principles as explained in section 3.3.1 on page it is possible to build the complete MNA matrix of the intrinsic JFET.
Applying the rules for creating the MNA matrix of an arbitrary network the complete MNA matrix entries (admittance matrix and current vector) for the intrinsic junction FET are:
The small signal Y-parameter matrix of the intrinsic junction FET writes as follows. It can be converted to S-parameters.
The junction capacitances are modeled with the following equations.
Both the drain and source resistance and generate thermal noise characterized by the following spectral density.
Channel noise and flicker noise generated by the DC transconductance and current flow from drain to source is characterized by the following spectral density.
The noise current correlation matrix (admittance representation) of the intrinsic junction FET can be expressed by
This matrix representation can be easily converted to the noise-wave representation if the small signal S-parameter matrix is known.
Temperature appears explicitly in the exponential terms of the JFET model equations. In addition, saturation current, gate-junction potential and zero-bias junction capacitances have built-in temperature dependence.
where the dependency has already been described in section 10.2.4 on page . Also the threshold voltage as well as the transconductance parameter have a temperature dependence determined by
The area factor used for the JFET model determines the number of equivalent parallel devices of a specified model. The following parameters are affected by the area factor.