Qucs project

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Latest release is: 0.0.15 LittleSurvey
MediaWiki

Latest News

3 Mar 2010 Publication "A Hybrid Verilog-A and Equation-defined Device Approach to MOS Switched Current Analog Cell Modeling and Simulation in the Transient and Large Signal AC Domains" has been accepted at MIXDES 2010 in Wrocław. Thanks a lot to Mike Brinson!

26 Feb 2010 Publication "Z Domain Delay Subcircuits and Compact Verilog-A Macromodels for Mixed-mode Sampled Data Circuit Simulation" at Radioelectronics & Informatics Journal is now online. Thanks a lot to M.E. Brinson and H. Nabijou!

31 Oct 2009 Implemented EMI receiver functionality for use in the equation solver. Thanks to Dirk for motivating and helping with this features implementation.

27 Oct 2009 Verilog-A syntax highlighting, association of symbol drawings to Verilog-A code and support for C++ code export of symbol drawings associated with Verilog-A files.

23 Oct 2009 Added Verilog-HDL syntax highlighting in text documents. Support for direct association of symbol drawings to Verilog-HDL and VHDL code.

9 Oct 2009 Added support for pre-compiled VHDL modules and libraries made from user-written VHDL code.

5 Oct 2009 Support for Matlab v4 as an export file format in the Qucs-Converter command line tool.

26 Sep 2009 Created FreeHDL MacOSX package. Please check this installer and give feedback if it works as expected.

14 Sep 2009 Released bugfixed MacOSX binary installer. Please download the package if the previous one didn't work for you.

10 Sep 2009 Ph.D. research topic open for application. Click here for more information.

19 May 2009 New section about time domain simulation using a simple LC tank example in the MediaWiki.

17 May 2009 Translation into Kazakh. Thanks a lot to Erbol!

16 May 2009 New section about parametric sweeps in the MediaWiki. Hope this is useful for someone.

10 May 2009 Preliminary new filter synthesis application (including Blinchikoff, Legendre, optimized Cauer, ZigZag and inverse Chebychev filter types) added. Thanks a lot to Vincent!

6 May 2009 Added another section about DC simulation for beginners in our MediaWiki. Please feedback. Also contributions from users would be very appreciated.

3 May 2009 Limited support for equations in Verilog-HDL and VHDL subcircuits.

25 Apr 2009 Released Qucs 0.0.15 !

21 Apr 2009 Publication "Compact device modelling for established and emerging technologies with the Qucs GPL circuit simulator" has been accepted at MIXDES 2009 in Łódź. Thanks a lot to Mike Brinson!

19 Apr 2009 Matrix exponentation for integral positive and negative powers available in equation solver. Implemented parameters in Verilog-HDL subcircuits.

16 Apr 2009 Introduced global nodes (e.g. subst!) in analogue simulator.

14 Apr 2009 VHDL files and subcircuits can handle typed generic variables as parameters.

6 Apr 2009 Updated list of available components.

1 Apr 2009 New transmission line defined by RLCG values available.

What's Qucs?

So far Qucs is not yet finished... but it is on the road.

Qucs is an integrated circuit simulator which means you are able to setup a circuit with a graphical user interface (GUI) and simulate the large-signal, small-signal and noise behaviour of the circuit. After that simulation has finished you can view the simulation results on a presentation page or window.

Qucs, briefly for Quite Universal Circuit Simulator, is a circuit simulator with graphical user interface (GUI). The GUI is based on Qt® by Trolltech®. The software aims to support all kinds of circuit simulation types, e.g. DC, AC, S-parameter, Harmonic Balance analysis, noise analysis, etc.

Qucsator, the simulation backend, is a command line circuit simulator. It takes a network list in a certain format as input and outputs a Qucs dataset. It has been programmed for usage in the Qucs project but may also be used by other applications.

So far we were working on the GUI and on some basic simulation features. In fact there is now a kind of useful user interface for setting up schematics and presenting simulation results in various types of diagrams. DC, AC, S-parameter, noise and transient analysis is possible, mathematical equations and use of a subcircuit hierarchy are available. Anyway, a lot of work has to be done and thus we are looking for people who want to support the project.

A few first versions can be downloaded in the download section. Please keep in mind that these versions are still incomplete and we hope that some of you will be able to compile and run the package by their own. Some example schematics have been setup to demonstrate the abilities of Qucs.

The Logo

Below the first draft of the Qucs logo done by Dotan Nahum <dotanx@gmail.com>.

Icons

Operating System

Qucs is currently developed under the GNU/Linux OS using the standard autotools with no special effort to support other operating systems. Qucs is said to be successfully compiled and run on Solaris, NetBSD, FreeBSD, MacOS, Windows and Cygwin... help is needed !

License

Qucs is released under the GPL license and so it is free for free programmers and users !

Reference

Qt® is a registered trademark of Trolltech® AS in Norway and other countries worldwide. Please click here for further copyright information.

visitors since 2005/04/27


3	Mar	2010	Publication "A Hybrid Verilog-A and Equation-defined Device Approach to MOS Switched Current Analog Cell Modeling and Simulation in the Transient and Large Signal AC Domains" has been accepted at MIXDES 2010 in Wrocław. Thanks a lot to Mike Brinson!
26	Feb	2010	Publication "Z Domain Delay Subcircuits and Compact Verilog-A Macromodels for Mixed-mode Sampled Data Circuit Simulation" at Radioelectronics & Informatics Journal is now online. Thanks a lot to M.E. Brinson and H. Nabijou!
31	Oct	2009	Implemented EMI receiver functionality for use in the equation solver. Thanks to Dirk for motivating and helping with this features implementation.
27	Oct	2009	Verilog-A syntax highlighting, association of symbol drawings to Verilog-A code and support for C++ code export of symbol drawings associated with Verilog-A files.
23	Oct	2009	Added Verilog-HDL syntax highlighting in text documents. Support for direct association of symbol drawings to Verilog-HDL and VHDL code.
9	Oct	2009	Added support for pre-compiled VHDL modules and libraries made from user-written VHDL code.
5	Oct	2009	Support for Matlab v4 as an export file format in the Qucs-Converter command line tool.
26	Sep	2009	Created FreeHDL MacOSX package. Please check this installer and give feedback if it works as expected.
14	Sep	2009	Released bugfixed MacOSX binary installer. Please download the package if the previous one didn't work for you.
10	Sep	2009	Ph.D. research topic open for application. Click here for more information.
19	May	2009	New section about time domain simulation using a simple LC tank example in the MediaWiki.
17	May	2009	Translation into Kazakh. Thanks a lot to Erbol!
16	May	2009	New section about parametric sweeps in the MediaWiki. Hope this is useful for someone.
10	May	2009	Preliminary new filter synthesis application (including Blinchikoff, Legendre, optimized Cauer, ZigZag and inverse Chebychev filter types) added. Thanks a lot to Vincent!
6	May	2009	Added another section about DC simulation for beginners in our MediaWiki. Please feedback. Also contributions from users would be very appreciated.
3	May	2009	Limited support for equations in Verilog-HDL and VHDL subcircuits.
25	Apr	2009	Released Qucs 0.0.15 !
21	Apr	2009	Publication "Compact device modelling for established and emerging technologies with the Qucs GPL circuit simulator" has been accepted at MIXDES 2009 in Łódź. Thanks a lot to Mike Brinson!
19	Apr	2009	Matrix exponentation for integral positive and negative powers available in equation solver. Implemented parameters in Verilog-HDL subcircuits.
16	Apr	2009	Introduced global nodes (e.g. subst!) in analogue simulator.
14	Apr	2009	VHDL files and subcircuits can handle typed generic variables as parameters.
6	Apr	2009	Updated list of available components.
1	Apr	2009	New transmission line defined by RLCG values available.